INSTRUCTIONS AND INSTRUCTION SEQUENCING

INSTRUCTIONS AND INSTRUCTION SEQUENCING

Four types of operations

  1. Data transfer between memory and processor registers.
  2. Arithmetic & logic operations on data
  3. Program sequencing & control
  4. I/O transfers.

1)      Register transfer notations(RTN)

R3<–[R1]+[R2]

  • Right hand side of RTN-denotes a value.
  • Left hand side of RTN-name of a location.

2)      Assembly language notations(ALN)

Add R1, R2, R3

  • Adding contents of R1, R2 & place sum in R3.

3)      Basic instruction types-4 types

  • Three address instructions- Add A,B,C

A, B-source operands

C-destination operands

  • Two address instructions-Add A,B

B <–[A] + [B]

  • One address instructions –Add A

Add contents of A to accumulator & store sum back to accumulator.

  • Zero address instructions

Instruction store operands in a structure called push down stack.

4)      Instruction execution & straight line sequencing

  • The processor control circuits use information in PC to fetch & execute instructions one at a time in order of increasing address.
  • This is called straight line sequencing.
  • Executing an instruction-2 phase procedures.
  • 1st phase–“instruction fetch”-instruction is fetched from memory location whose address is in PC.
  • This instruction is placed in instruction register in processor
  • 2nd phase-“instruction execute”-instruction in IR is examined to determine which operation to be performed.

5)      Branching

  • Branch-type of instruction loads a new value into program counter.
  • So processor fetches & executes instruction at this new address called “branch target”
  • Conditional branch-causes a branch if a specified condition is satisfied.
  • E.g. Branch>0 LOOP –conditional branch instruction .it executes only if it satisfies condition.

6)      Condition codes

  • Recording required information in individual bits called “condition code flags”.
  • These flags are grouped together in a special processor register called “condition code register” or “status register”
  • Individual condition code flags-1 or 0.
  • 4 commonly used flags.

1)      N (negative)-set to 1 if result is –ve or else 0.

2)      Z (zero)-set to 1 if result is 0, or else 0 .

3)      V (overflow)-set to 1if arithmetic overflow occurs or else 0.

4)      C(carry)-set to 1 if carry out results from operation or else 0


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Posted on April 28, 2011, in COMPUTER ORGANIZATION AND ARCHITECTURE. Bookmark the permalink. Leave a comment.

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